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Text File  |  1996-05-16  |  117KB  |  3,416 lines
  1. #
  2. #    $Id: stl10018.da@ 1.2 1996/05/15 15:33:39 arisawa Exp $
  3. #
  4. #    Copyright (C) 1995, Diamond Multimedia Systems.
  5. #
  6. #    File:        stl10018.dat
  7. #
  8. #    Purpose:    This file contains the board and mode information for a
  9. #                Stealth 64 Video VRAM: S3 968, 2MB, IBM 526 220Mhz DAC.
  10. #            This file is for Japanese Windows 95.
  11. #
  12.  
  13. [Objects]
  14. Draweng32=s3x6832.drw
  15. Dac=ibm525.dac
  16. Cursor=ibm525.cur
  17. PixClk=ibm525.clk
  18. Draweng=s3x68.drw
  19.  
  20. [BoardInfo]
  21. wMinimumFormatBltWidth16bpp=16
  22. wMinimumFormatBltWidth32bpp=16
  23. bPixelFormatter=1
  24. bViewports=1
  25. bNewMMIO=1
  26. bTwoPtLine=1
  27. ValidateBAR=YES
  28. SwapVLA30A25=YES
  29.  
  30. [Desktops]
  31. 2048,768,8
  32. 1600,1200,8
  33. 1280,1024,8
  34. 1152,864,16
  35. 1152,864,8
  36. 1024,1536,8
  37. 1024,768,16
  38. 1024,768,8
  39. 800,600,32
  40. 800,600,24
  41. 800,600,16
  42. 800,600,8
  43. 640,480,32
  44. 640,480,24
  45. 640,480,16
  46. 640,480,8
  47.  
  48. [Viewports]
  49. 1600,1200,8,95,76
  50. 1600,1200,8,94,75
  51. 1600,1200,8,82,66
  52. 1600,1200,8,75,60
  53. 1280,1024,8,95,90
  54. 1280,1024,8,79,75
  55. 1280,1024,8,76,72
  56. 1280,1024,8,74,70
  57. 1280,1024,8,64,60
  58. 1152,864,16,82,90
  59. 1152,864,16,71,75
  60. 1152,864,16,64,70
  61. 1152,864,16,56,60
  62. 1152,864,8,82,90
  63. 1152,864,8,71,75
  64. 1152,864,8,64,70
  65. 1152,864,8,56,60
  66. 1024,768,16,96,120
  67. 1024,768,16,81,100
  68. 1024,768,16,64,80
  69. 1024,768,16,60,75
  70. 1024,768,16,58,72
  71. 1024,768,16,56,70
  72. 1024,768,16,48,60
  73. 1024,768,8,96,120
  74. 1024,768,8,81,100
  75. 1024,768,8,64,80
  76. 1024,768,8,60,75
  77. 1024,768,8,58,72
  78. 1024,768,8,56,70
  79. 1024,768,8,48,60
  80. 800,600,32,75,120
  81. 800,600,32,64,100
  82. 800,600,32,56,90
  83. 800,600,32,46,75
  84. 800,600,32,48,72
  85. 800,600,32,37,60
  86. 800,600,32,35,56
  87. 800,600,24,75,120
  88. 800,600,24,64,100
  89. 800,600,24,56,90
  90. 800,600,24,46,75
  91. 800,600,24,48,72
  92. 800,600,24,37,60
  93. 800,600,24,35,56
  94. 800,600,16,75,120
  95. 800,600,16,64,100
  96. 800,600,16,56,90
  97. 800,600,16,46,75
  98. 800,600,16,48,72
  99. 800,600,16,37,60
  100. 800,600,16,35,56
  101. 800,600,8,75,120
  102. 800,600,8,64,100
  103. 800,600,8,56,90
  104. 800,600,8,46,75
  105. 800,600,8,48,72
  106. 800,600,8,37,60
  107. 800,600,8,35,56
  108. 640,480,32,64,120
  109. 640,480,32,52,100
  110. 640,480,32,48,90
  111. 640,480,32,37,75
  112. 640,480,32,37,72
  113. 640,480,32,31,60
  114. 640,480,24,64,120
  115. 640,480,24,52,100
  116. 640,480,24,48,90
  117. 640,480,24,37,75
  118. 640,480,24,37,72
  119. 640,480,24,31,60
  120. 640,480,16,64,120
  121. 640,480,16,52,100
  122. 640,480,16,48,90
  123. 640,480,16,37,75
  124. 640,480,16,37,72
  125. 640,480,16,31,60
  126. 640,480,8,64,120
  127. 640,480,8,52,100
  128. 640,480,8,48,90
  129. 640,480,8,37,75
  130. 640,480,8,37,72
  131. 640,480,8,31,60
  132.  
  133. [TextMode]
  134. CRT, RUN, EXTENDED_BIOS_FLAGS_2, 1
  135. SHELL, I10, 0x0003,  0x0000
  136. CRT, RUN, REG_LOCK_1, 0x48
  137. CRT, RUN, REG_LOCK_2, 0xA0
  138.  
  139. [GraphicsEnable]
  140. CRT, RMW, LAW_CONTROL, 0xEC, 0x13
  141. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x18
  142.  
  143. [GraphicsDisable]
  144. CRT, RMW, LAW_CONTROL, 0xEC, 0x00
  145. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x00
  146.  
  147. [2048,768,8]
  148. # Setting Line Pitch
  149. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  150. CRT,RUN,EXT_MODE,0x00
  151. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  152. # Setting Engine Pitch
  153. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  154. CRT,RUN,MEM_CONFIG,0x8f
  155. # Setting Basic Mode Registers.The registers
  156. # below are neither Desktop or Viewport Regs
  157. # Unlock Sequencer
  158. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  159. # Dump Sequencer Registers
  160. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  161. # Dump Graphics Controller Registers
  162. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  163. # Dump Attribute Controller Registers
  164. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  165. # Lock Sequencer
  166. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  167. DAC_IDR, RUN, DAC_OPERATION, 0x02
  168. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  169. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  170. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  171. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  172. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  173. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  174. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  175. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  176. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  177.  
  178. [1024,1536,8]
  179. # Setting Line Pitch
  180. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  181. CRT,RUN,EXT_MODE,0x00
  182. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  183. # Setting Engine Pitch
  184. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  185. CRT,RUN,MEM_CONFIG,0x09
  186. # Setting Basic Mode Registers.The registers
  187. # below are neither Desktop or Viewport Regs
  188. # Unlock Sequencer
  189. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  190. # Dump Sequencer Registers
  191. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  192. # Dump Graphics Controller Registers
  193. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  194. # Dump Attribute Controller Registers
  195. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  196. # Lock Sequencer
  197. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  198. DAC_IDR, RUN, DAC_OPERATION, 0x02
  199. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  200. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  201. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  202. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  203. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  204. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  205. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  206. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  207. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  208.  
  209. [1600,1200,8]
  210. # Setting Line Pitch
  211. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  212. CRT,RUN,EXT_MODE,0x00
  213. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  214. # Setting Engine Pitch
  215. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x81
  216. CRT,RUN,MEM_CONFIG,0x8b
  217. # Setting Basic Mode Registers.The registers
  218. # below are neither Desktop or Viewport Regs
  219. # Unlock Sequencer
  220. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  221. # Dump Sequencer Registers
  222. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  223. # Dump Graphics Controller Registers
  224. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  225. # Dump Attribute Controller Registers
  226. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  227. # Lock Sequencer
  228. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  229. DAC_IDR, RUN, DAC_OPERATION, 0x02
  230. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  231. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  232. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  233. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  234. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  235. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  236. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  237. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  238. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  239.  
  240. [1280,1024,8]
  241. # Setting Line Pitch
  242. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  243. CRT,RUN,EXT_MODE,0x00
  244. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  245. # Setting Engine Pitch
  246. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xc0
  247. CRT,RUN,MEM_CONFIG,0x0b
  248. # Setting Basic Mode Registers.The registers
  249. # below are neither Desktop or Viewport Regs
  250. # Unlock Sequencer
  251. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  252. # Dump Sequencer Registers
  253. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  254. # Dump Graphics Controller Registers
  255. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  256. # Dump Attribute Controller Registers
  257. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  258. # Lock Sequencer
  259. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  260. DAC_IDR, RUN, DAC_OPERATION, 0x02
  261. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  262. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  263. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  264. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  265. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  266. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  267. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  268. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  269. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  270.  
  271. [1152,864,16]
  272. # Setting Line Pitch
  273. CRT,RUN,LOGICAL_LINE_LENGTH,0x20
  274. CRT,RUN,EXT_MODE,0x00
  275. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  276. # Setting Engine Pitch
  277. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x11
  278. CRT,RUN,MEM_CONFIG,0x89
  279. # Setting Basic Mode Registers.The registers
  280. # below are neither Desktop or Viewport Regs
  281. # Unlock Sequencer
  282. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  283. # Dump Sequencer Registers
  284. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  285. # Dump Graphics Controller Registers
  286. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  287. # Dump Attribute Controller Registers
  288. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  289. # Lock Sequencer
  290. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  291. DAC_IDR, RUN, DAC_OPERATION, 0x02
  292. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  293. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  294. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  295. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  296. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  297. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  298. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  299. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  300. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  301.  
  302. [1152,864,8]
  303. # Setting Line Pitch
  304. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  305. CRT,RUN,EXT_MODE,0x00
  306. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  307. # Setting Engine Pitch
  308. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x01
  309. CRT,RUN,MEM_CONFIG,0x89
  310. # Setting Basic Mode Registers.The registers
  311. # below are neither Desktop or Viewport Regs
  312. # Unlock Sequencer
  313. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  314. # Dump Sequencer Registers
  315. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  316. # Dump Graphics Controller Registers
  317. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  318. # Dump Attribute Controller Registers
  319. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  320. # Lock Sequencer
  321. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  322. DAC_IDR, RUN, DAC_OPERATION, 0x02
  323. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  324. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  325. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  326. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  327. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  328. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  329. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  330. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  331. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  332.  
  333. [1024,768,16]
  334. # Setting Line Pitch
  335. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  336. CRT,RUN,EXT_MODE,0x00
  337. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  338. # Setting Engine Pitch
  339. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
  340. CRT,RUN,MEM_CONFIG,0x89
  341. # Setting Basic Mode Registers.The registers
  342. # below are neither Desktop or Viewport Regs
  343. # Unlock Sequencer
  344. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  345. # Dump Sequencer Registers
  346. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  347. # Dump Graphics Controller Registers
  348. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  349. # Dump Attribute Controller Registers
  350. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  351. # Lock Sequencer
  352. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  353. DAC_IDR, RUN, DAC_OPERATION, 0x02
  354. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  355. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  356. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  357. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  358. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  359. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  360. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  361. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  362. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  363.  
  364. [1024,768,8]
  365. # Setting Line Pitch
  366. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  367. CRT,RUN,EXT_MODE,0x00
  368. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  369. # Setting Engine Pitch
  370. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  371. CRT,RUN,MEM_CONFIG,0x09
  372. # Setting Basic Mode Registers.The registers
  373. # below are neither Desktop or Viewport Regs
  374. # Unlock Sequencer
  375. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  376. # Dump Sequencer Registers
  377. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  378. # Dump Graphics Controller Registers
  379. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  380. # Dump Attribute Controller Registers
  381. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  382. # Lock Sequencer
  383. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  384. DAC_IDR, RUN, DAC_OPERATION, 0x02
  385. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  386. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  387. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  388. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  389. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  390. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  391. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  392. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  393. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  394.  
  395. [800,600,32]
  396. # Setting Line Pitch
  397. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  398. CRT,RUN,EXT_MODE,0x00
  399. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  400. # Setting Engine Pitch
  401. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xb0
  402. CRT,RUN,MEM_CONFIG,0x89
  403. # Setting Basic Mode Registers.The registers
  404. # below are neither Desktop or Viewport Regs
  405. # Unlock Sequencer
  406. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  407. # Dump Sequencer Registers
  408. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  409. # Dump Graphics Controller Registers
  410. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  411. # Dump Attribute Controller Registers
  412. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  413. # Lock Sequencer
  414. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  415. DAC_IDR, RUN, DAC_OPERATION, 0x02
  416. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  417. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  418. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  419. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  420. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  421. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  422. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  423. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  424. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  425.  
  426. [800,600,24]
  427. # Setting Line Pitch
  428. CRT,RUN,LOGICAL_LINE_LENGTH,0x2c
  429. CRT,RUN,EXT_MODE,0x00
  430. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  431. # Setting Engine Pitch
  432. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xa0
  433. CRT,RUN,MEM_CONFIG,0x8b
  434. # Setting Basic Mode Registers.The registers
  435. # below are neither Desktop or Viewport Regs
  436. # Unlock Sequencer
  437. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  438. # Dump Sequencer Registers
  439. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  440. # Dump Graphics Controller Registers
  441. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  442. # Dump Attribute Controller Registers
  443. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  444. # Lock Sequencer
  445. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  446. DAC_IDR, RUN, DAC_OPERATION, 0x02
  447. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  448. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  449. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  450. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  451. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  452. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  453. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  454. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  455. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  456.  
  457. [800,600,16]
  458. # Setting Line Pitch
  459. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  460. CRT,RUN,EXT_MODE,0x00
  461. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  462. # Setting Engine Pitch
  463. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x90
  464. CRT,RUN,MEM_CONFIG,0x89
  465. # Setting Basic Mode Registers.The registers
  466. # below are neither Desktop or Viewport Regs
  467. # Unlock Sequencer
  468. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  469. # Dump Sequencer Registers
  470. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  471. # Dump Graphics Controller Registers
  472. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  473. # Dump Attribute Controller Registers
  474. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  475. # Lock Sequencer
  476. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  477. DAC_IDR, RUN, DAC_OPERATION, 0x02
  478. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  479. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  480. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  481. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  482. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  483. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  484. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  485. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  486. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  487.  
  488. [800,600,8]
  489. # Setting Line Pitch
  490. CRT,RUN,LOGICAL_LINE_LENGTH,0x64
  491. CRT,RUN,EXT_MODE,0x00
  492. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  493. # Setting Engine Pitch
  494. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x80
  495. CRT,RUN,MEM_CONFIG,0x89
  496. # Setting Basic Mode Registers.The registers
  497. # below are neither Desktop or Viewport Regs
  498. # Unlock Sequencer
  499. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  500. # Dump Sequencer Registers
  501. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  502. # Dump Graphics Controller Registers
  503. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  504. # Dump Attribute Controller Registers
  505. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  506. # Lock Sequencer
  507. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  508. DAC_IDR, RUN, DAC_OPERATION, 0x02
  509. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  510. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  511. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  512. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  513. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  514. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  515. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  516. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  517. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  518.  
  519. [640,480,32]
  520. # Setting Line Pitch
  521. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  522. CRT,RUN,EXT_MODE,0x00
  523. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  524. # Setting Engine Pitch
  525. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x70
  526. CRT,RUN,MEM_CONFIG,0x89
  527. # Setting Basic Mode Registers.The registers
  528. # below are neither Desktop or Viewport Regs
  529. # Unlock Sequencer
  530. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  531. # Dump Sequencer Registers
  532. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  533. # Dump Graphics Controller Registers
  534. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  535. # Dump Attribute Controller Registers
  536. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  537. # Lock Sequencer
  538. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  539. DAC_IDR, RUN, DAC_OPERATION, 0x02
  540. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  541. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  542. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  543. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  544. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  545. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  546. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  547. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  548. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  549.  
  550. [640,480,24]
  551. # Setting Line Pitch
  552. CRT,RUN,LOGICAL_LINE_LENGTH,0xf0
  553. CRT,RUN,EXT_MODE,0x00
  554. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  555. # Setting Engine Pitch
  556. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x60
  557. CRT,RUN,MEM_CONFIG,0x8b
  558. # Setting Basic Mode Registers.The registers
  559. # below are neither Desktop or Viewport Regs
  560. # Unlock Sequencer
  561. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  562. # Dump Sequencer Registers
  563. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  564. # Dump Graphics Controller Registers
  565. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  566. # Dump Attribute Controller Registers
  567. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  568. # Lock Sequencer
  569. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  570. DAC_IDR, RUN, DAC_OPERATION, 0x02
  571. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  572. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  573. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  574. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  575. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  576. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  577. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  578. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  579. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  580.  
  581. [640,480,16]
  582. # Setting Line Pitch
  583. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  584. CRT,RUN,EXT_MODE,0x00
  585. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  586. # Setting Engine Pitch
  587. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x50
  588. CRT,RUN,MEM_CONFIG,0x89
  589. # Setting Basic Mode Registers.The registers
  590. # below are neither Desktop or Viewport Regs
  591. # Unlock Sequencer
  592. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  593. # Dump Sequencer Registers
  594. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  595. # Dump Graphics Controller Registers
  596. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  597. # Dump Attribute Controller Registers
  598. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  599. # Lock Sequencer
  600. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  601. DAC_IDR, RUN, DAC_OPERATION, 0x02
  602. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  603. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  604. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  605. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  606. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  607. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  608. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  609. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  610. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  611.  
  612. [640,480,8]
  613. # Setting Line Pitch
  614. CRT,RUN,LOGICAL_LINE_LENGTH,0x50
  615. CRT,RUN,EXT_MODE,0x00
  616. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  617. # Setting Engine Pitch
  618. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x40
  619. CRT,RUN,MEM_CONFIG,0x89
  620. # Setting Basic Mode Registers.The registers
  621. # below are neither Desktop or Viewport Regs
  622. # Unlock Sequencer
  623. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  624. # Dump Sequencer Registers
  625. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  626. # Dump Graphics Controller Registers
  627. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  628. # Dump Attribute Controller Registers
  629. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  630. # Lock Sequencer
  631. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  632. DAC_IDR, RUN, DAC_OPERATION, 0x02
  633. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  634. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  635. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  636. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  637. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  638. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  639. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  640. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  641. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  642.  
  643. [1600,1200,8,95,76]
  644. # Unlock CRTC
  645. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  646. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  647. CRT,RUN,REG_LOCK_1,0x48,0xa5
  648. # Dump CRT Controller Registers
  649. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x10,0xe0,0x00,0x00,0x40
  650. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  651. CRT,RUN,VERT_RETRACE_START,0xb2,0x07,0xaf
  652. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  653. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  654. CRT,RUN,MISC_1,0x15,0x79,0x14,0x11
  655. CRT,RUN,MODE_CONTROL,0x02
  656. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  657. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  658. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  659. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  660. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  661. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  662. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  663. # Lock CRTC Reg 11 for compatibility
  664. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  665. # Dump ENG Register
  666. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  667. # Dump MISCOUT Register
  668. DIR,RUN,MISC_WRITE,0xef
  669. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  670. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  671. CLK_IND, RUN, FREQ_2, 0xe0
  672. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  673. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  674. CRT,RUN,LATCH_DATA, 0x08
  675.  
  676.  
  677. [1600,1200,8,94,75]
  678. # Unlock CRTC
  679. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  680. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  681. CRT,RUN,REG_LOCK_1,0x48,0xa5
  682. # Dump CRT Controller Registers
  683. CRT,RUN,HORZ_TOTAL,0x82,0x64,0x62,0x05,0x68,0x14,0xe0,0x00,0x00,0x40
  684. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  685. CRT,RUN,VERT_RETRACE_START,0xb0,0x03,0xaf
  686. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  687. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  688. CRT,RUN,MISC_1,0x15,0x7d,0x14,0x11
  689. CRT,RUN,MODE_CONTROL,0x02
  690. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  691. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  692. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  693. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  694. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  695. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  696. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  697. # Lock CRTC Reg 11 for compatibility
  698. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  699. # Dump ENG Register
  700. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  701. # Dump MISCOUT Register
  702. DIR,RUN,MISC_WRITE,0xef
  703. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  704. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  705. CLK_IND, RUN, FREQ_2, 0xe2
  706. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  707. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  708. CRT,RUN,LATCH_DATA, 0x08
  709.  
  710.  
  711. [1600,1200,8,82,66]
  712. # Unlock CRTC
  713. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  714. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  715. CRT,RUN,REG_LOCK_1,0x48,0xa5
  716. # Dump CRT Controller Registers
  717. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x11,0xe6,0x00,0x00,0x40
  718. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  719. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  720. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  721. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  722. CRT,RUN,MISC_1,0x15,0x78,0x14,0x11
  723. CRT,RUN,MODE_CONTROL,0x02
  724. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  725. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  726. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  727. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  728. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  729. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  730. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  731. # Lock CRTC Reg 11 for compatibility
  732. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  733. # Dump ENG Register
  734. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  735. # Dump MISCOUT Register
  736. DIR,RUN,MISC_WRITE,0xef
  737. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  738. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  739. CLK_IND, RUN, FREQ_2, 0xd3
  740. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  741. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  742. CRT,RUN,LATCH_DATA, 0x08
  743.  
  744. [1600,1200,8,75,60]
  745. # Unlock CRTC
  746. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  747. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  748. CRT,RUN,REG_LOCK_1,0x48,0xa5
  749. # Dump CRT Controller Registers
  750. CRT,RUN,HORZ_TOTAL,0x7f,0x64,0x62,0x02,0x68,0x12,0xe8,0x00,0x00,0x40
  751. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  752. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  753. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  754. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  755. CRT,RUN,MISC_1,0x15,0x77,0x14,0x11
  756. CRT,RUN,MODE_CONTROL,0x02
  757. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  758. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  759. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  760. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  761. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  762. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  763. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  764. # Lock CRTC Reg 11 for compatibility
  765. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  766. # Dump ENG Register
  767. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  768. # Dump MISCOUT Register
  769. DIR,RUN,MISC_WRITE,0xef
  770. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  771. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  772. CLK_IND, RUN, FREQ_2, 0xcd
  773. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  774. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  775. CRT,RUN,LATCH_DATA, 0x08
  776.  
  777. [1280,1024,8,95,90]
  778. # Unlock CRTC
  779. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  780. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  781. CRT,RUN,REG_LOCK_1,0x48,0xa5
  782. # Dump CRT Controller Registers
  783. CRT,RUN,HORZ_TOTAL,0x67,0x4f,0x50,0x8b,0x56,0x9f,0x2a,0x42,0x00,0x40
  784. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  785. CRT,RUN,VERT_RETRACE_START,0x03,0x07,0xff
  786. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2a,0xe3,0xff
  787. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  788. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  789. CRT,RUN,MODE_CONTROL,0x02
  790. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  791. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  792. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  793. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  794. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  795. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  796. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  797. # Lock CRTC Reg 11 for compatibility
  798. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  799. # Dump ENG Register
  800. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  801. # Dump MISCOUT Register
  802. DIR,RUN,MISC_WRITE,0xef
  803. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  804. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  805. CLK_IND, RUN, FREQ_2, 0xd0
  806. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  807. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  808. CRT,RUN,LATCH_DATA, 0x08
  809.  
  810.  
  811. [1280,1024,8,79,75]
  812. # Unlock CRTC
  813. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  814. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  815. CRT,RUN,REG_LOCK_1,0x48,0xa5
  816. # Dump CRT Controller Registers
  817. CRT,RUN,HORZ_TOTAL,0x64,0x4f,0x50,0x89,0x54,0x9f,0x2c,0x42,0x00,0x40
  818. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  819. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  820. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2c,0xe3,0xff
  821. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  822. CRT,RUN,MISC_1,0x15,0x5e,0x14,0x11
  823. CRT,RUN,MODE_CONTROL,0x02
  824. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  825. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  826. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  827. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  828. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  829. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  830. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  831. # Lock CRTC Reg 11 for compatibility
  832. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  833. # Dump ENG Register
  834. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  835. # Dump MISCOUT Register
  836. DIR,RUN,MISC_WRITE,0xef
  837. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  838. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  839. CLK_IND, RUN, FREQ_2, 0xc1
  840. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  841. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  842. CRT,RUN,LATCH_DATA, 0x08
  843.  
  844. [1280,1024,8,76,72]
  845. # Unlock CRTC
  846. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  847. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  848. CRT,RUN,REG_LOCK_1,0x48,0xa5
  849. # Dump CRT Controller Registers
  850. CRT,RUN,HORZ_TOTAL,0x69,0x4f,0x50,0x8c,0x57,0x9c,0x27,0x42,0x00,0x40
  851. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  852. CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
  853. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x23,0xe3,0xff
  854. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  855. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  856. CRT,RUN,MODE_CONTROL,0x02
  857. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  858. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  859. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  860. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  861. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  862. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  863. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  864. # Lock CRTC Reg 11 for compatibility
  865. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  866. # Dump ENG Register
  867. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  868. # Dump MISCOUT Register
  869. DIR,RUN,MISC_WRITE,0xef
  870. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  871. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  872. CLK_IND, RUN, FREQ_2, 0xc1
  873. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  874. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  875. CRT,RUN,LATCH_DATA, 0x08
  876.  
  877. [1280,1024,8,74,70]
  878. # Unlock CRTC
  879. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  880. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  881. CRT,RUN,REG_LOCK_1,0x48,0xa5
  882. # Dump CRT Controller Registers
  883. CRT,RUN,HORZ_TOTAL,0x65,0x4f,0x50,0x8a,0x5a,0x82,0x28,0x52,0x00,0x40
  884. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  885. CRT,RUN,VERT_RETRACE_START,0x00,0x05,0xff
  886. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  887. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  888. CRT,RUN,MISC_1,0x15,0x60,0x14,0x11
  889. CRT,RUN,MODE_CONTROL,0x02
  890. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  891. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  892. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  893. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  894. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  895. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  896. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  897. # Lock CRTC Reg 11 for compatibility
  898. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  899. # Dump ENG Register
  900. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  901. # Dump MISCOUT Register
  902. DIR,RUN,MISC_WRITE,0xef
  903. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  904. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  905. CLK_IND, RUN, FREQ_2, 0xba
  906. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  907. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  908. CRT,RUN,LATCH_DATA, 0x08
  909.  
  910. [1280,1024,8,64,60]
  911. # Unlock CRTC
  912. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  913. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  914. CRT,RUN,REG_LOCK_1,0x48,0xa5
  915. # Dump CRT Controller Registers
  916. ##CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x57,0x9c,0x33,0x42,0x00,0x40
  917. CRT,RUN,HORZ_TOTAL,0x65,0x4f,0x50,0x8a,0x57,0x9e,0x28,0x52,0x00,0x40
  918. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  919. ##CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  920. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  921. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x28,0xe3,0xff
  922. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  923. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  924. ##CRT,RUN,MISC_1,0x15,0x5f,0x14,0x11
  925. CRT,RUN,MISC_1,0x15,0x60,0x14,0x11
  926. CRT,RUN,MODE_CONTROL,0x02
  927. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  928. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  929. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  930. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  931. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  932. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  933. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  934. # Lock CRTC Reg 11 for compatibility
  935. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  936. # Dump ENG Register
  937. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  938. # Dump MISCOUT Register
  939. DIR,RUN,MISC_WRITE,0xef
  940. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  941. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  942. ##CLK_IND, RUN, FREQ_2, 0xab
  943. CLK_IND, RUN, FREQ_2, 0xa9
  944. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  945. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  946. CRT,RUN,LATCH_DATA, 0x08
  947.  
  948. [1152,864,8,82,90]
  949. # Unlock CRTC
  950. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  951. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  952. CRT,RUN,REG_LOCK_1,0x48,0xa5
  953. # Dump CRT Controller Registers
  954. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4e,0x12,0x95,0xff,0x00,0x60
  955. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  956. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  957. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  958. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  959. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  960. CRT,RUN,MODE_CONTROL,0x02
  961. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  962. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  963. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  964. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  965. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  966. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  967. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  968. # Lock CRTC Reg 11 for compatibility
  969. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  970. # Dump ENG Register
  971. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  972. # Dump MISCOUT Register
  973. DIR,RUN,MISC_WRITE,0xef
  974. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  975. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  976. CLK_IND, RUN, FREQ_2, 0xb9
  977. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  978. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  979. CRT,RUN,LATCH_DATA, 0x08
  980.  
  981. [1152,864,8,71,75]
  982. # Unlock CRTC
  983. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  984. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  985. CRT,RUN,REG_LOCK_1,0x48,0xa5
  986. # Dump CRT Controller Registers
  987. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x50,0x14,0xb7,0xff,0x00,0x60
  988. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  989. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  990. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  991. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  992. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  993. CRT,RUN,MODE_CONTROL,0x02
  994. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  995. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  996. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  997. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  998. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  999. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1000. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1001. # Lock CRTC Reg 11 for compatibility
  1002. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1003. # Dump ENG Register
  1004. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1005. # Dump MISCOUT Register
  1006. DIR,RUN,MISC_WRITE,0xef
  1007. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1008. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1009. CLK_IND, RUN, FREQ_2, 0xa9
  1010. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1011. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1012. CRT,RUN,LATCH_DATA, 0x08
  1013.  
  1014. [1152,864,8,64,70]
  1015. # Unlock CRTC
  1016. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1017. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1018. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1019. # Dump CRT Controller Registers
  1020. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4f,0x14,0x92,0xff,0x00,0x60
  1021. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1022. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1023. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1024. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1025. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1026. CRT,RUN,MODE_CONTROL,0x02
  1027. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1028. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1029. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1030. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1031. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1032. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1033. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1034. # Lock CRTC Reg 11 for compatibility
  1035. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1036. # Dump ENG Register
  1037. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1038. # Dump MISCOUT Register
  1039. DIR,RUN,MISC_WRITE,0xef
  1040. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1041. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1042. CLK_IND, RUN, FREQ_2, 0x9b
  1043. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1044. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1045. CRT,RUN,LATCH_DATA, 0x08
  1046.  
  1047. [1152,864,8,56,60]
  1048. # Unlock CRTC
  1049. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1050. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1051. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1052. # Dump CRT Controller Registers
  1053. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x4e,0x12,0xac,0xff,0x00,0x60
  1054. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1055. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1056. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1057. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1058. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1059. CRT,RUN,MODE_CONTROL,0x02
  1060. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1061. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1062. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1063. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1064. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1065. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1066. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1067. # Lock CRTC Reg 11 for compatibility
  1068. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1069. # Dump ENG Register
  1070. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1071. # Dump MISCOUT Register
  1072. DIR,RUN,MISC_WRITE,0xef
  1073. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1074. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1075. CLK_IND, RUN, FREQ_2, 0x90
  1076. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1077. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1078. CRT,RUN,LATCH_DATA, 0x08
  1079.  
  1080.  
  1081. [1152,864,16,82,90]
  1082. # Unlock CRTC
  1083. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1084. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1085. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1086. # Dump CRT Controller Registers
  1087. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  1088. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1089. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  1090. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  1091. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1092. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1093. CRT,RUN,MODE_CONTROL,0x02
  1094. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1095. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1096. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1097. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1098. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1099. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1100. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1101. # Lock CRTC Reg 11 for compatibility
  1102. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1103. # Dump ENG Register
  1104. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1105. # Dump MISCOUT Register
  1106. DIR,RUN,MISC_WRITE,0xef
  1107. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1108. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1109. CLK_IND, RUN, FREQ_2, 0xb9
  1110. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1111. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1112. CRT,RUN,LATCH_DATA, 0x00
  1113.  
  1114.  
  1115. [1152,864,16,71,75]
  1116. # Unlock CRTC
  1117. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1118. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1119. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1120. # Dump CRT Controller Registers
  1121. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  1122. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1123. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  1124. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  1125. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1126. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1127. CRT,RUN,MODE_CONTROL,0x02
  1128. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1129. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1130. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1131. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1132. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1133. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1134. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1135. # Lock CRTC Reg 11 for compatibility
  1136. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1137. # Dump ENG Register
  1138. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1139. # Dump MISCOUT Register
  1140. DIR,RUN,MISC_WRITE,0xef
  1141. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1142. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1143. CLK_IND, RUN, FREQ_2, 0xa9
  1144. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1145. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1146. CRT,RUN,LATCH_DATA, 0x00
  1147.  
  1148.  
  1149. [1152,864,16,64,70]
  1150. # Unlock CRTC
  1151. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1152. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1153. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1154. # Dump CRT Controller Registers
  1155. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1156. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1157. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1158. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1159. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1160. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1161. CRT,RUN,MODE_CONTROL,0x02
  1162. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1163. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1164. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1165. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1166. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1167. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1168. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1169. # Lock CRTC Reg 11 for compatibility
  1170. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1171. # Dump ENG Register
  1172. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1173. # Dump MISCOUT Register
  1174. DIR,RUN,MISC_WRITE,0xef
  1175. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1176. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1177. CLK_IND, RUN, FREQ_2, 0x9b
  1178. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1179. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1180. CRT,RUN,LATCH_DATA, 0x00
  1181.  
  1182. [1152,864,16,56,60]
  1183. # Unlock CRTC
  1184. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1185. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1186. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1187. # Dump CRT Controller Registers
  1188. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1189. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1190. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1191. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1192. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1193. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1194. CRT,RUN,MODE_CONTROL,0x02
  1195. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1196. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1197. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1198. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1199. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1200. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1201. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1202. # Lock CRTC Reg 11 for compatibility
  1203. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1204. # Dump ENG Register
  1205. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1206. # Dump MISCOUT Register
  1207. DIR,RUN,MISC_WRITE,0xef
  1208. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1209. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1210. CLK_IND, RUN, FREQ_2, 0x90
  1211. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1212. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1213. CRT,RUN,LATCH_DATA, 0x00
  1214.  
  1215. [1024,768,16,96,120]
  1216. # Unlock CRTC
  1217. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1218. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1219. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1220. # Dump CRT Controller Registers
  1221. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  1222. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1223. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  1224. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1225. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1226. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  1227. CRT,RUN,MODE_CONTROL,0x02
  1228. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1229. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1230. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1231. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1232. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1233. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1234. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1235. # Lock CRTC Reg 11 for compatibility
  1236. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1237. # Dump ENG Register
  1238. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1239. # Dump MISCOUT Register
  1240. DIR,RUN,MISC_WRITE,0xef
  1241. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1242. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1243. CLK_IND, RUN, FREQ_2, 0xbd
  1244. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1245. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1246. CRT,RUN,LATCH_DATA, 0x00
  1247.  
  1248. [1024,768,16,81,100]
  1249. # Unlock CRTC
  1250. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1251. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1252. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1253. # Dump CRT Controller Registers
  1254. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  1255. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1256. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  1257. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1258. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1259. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  1260. CRT,RUN,MODE_CONTROL,0x02
  1261. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1262. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1263. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1264. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1265. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1266. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1267. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1268. # Lock CRTC Reg 11 for compatibility
  1269. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1270. # Dump ENG Register
  1271. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1272. # Dump MISCOUT Register
  1273. DIR,RUN,MISC_WRITE,0xef
  1274. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1275. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1276. CLK_IND, RUN, FREQ_2, 0xa9
  1277. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1278. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1279. CRT,RUN,LATCH_DATA, 0x00
  1280.  
  1281. [1024,768,16,64,80]
  1282. # Unlock CRTC
  1283. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1284. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1285. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1286. # Dump CRT Controller Registers
  1287. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1288. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1289. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1290. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1291. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1292. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1293. CRT,RUN,MODE_CONTROL,0x02
  1294. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1295. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1296. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1297. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1298. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1299. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1300. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1301. # Lock CRTC Reg 11 for compatibility
  1302. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1303. # Dump ENG Register
  1304. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1305. # Dump MISCOUT Register
  1306. DIR,RUN,MISC_WRITE,0xef
  1307. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1308. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1309. CLK_IND, RUN, FREQ_2, 0x93
  1310. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1311. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1312. CRT,RUN,LATCH_DATA, 0x00
  1313.  
  1314. [1024,768,16,60,75]
  1315. # Unlock CRTC
  1316. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1317. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1318. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1319. # Dump CRT Controller Registers
  1320. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  1321. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1322. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1323. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  1324. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1325. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1326. CRT,RUN,MODE_CONTROL,0x02
  1327. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1328. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1329. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1330. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1331. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1332. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1333. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1334. # Lock CRTC Reg 11 for compatibility
  1335. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1336. # Dump ENG Register
  1337. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1338. # Dump MISCOUT Register
  1339. DIR,RUN,MISC_WRITE,0xef
  1340. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1341. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1342. CLK_IND, RUN, FREQ_2, 0x8c
  1343. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1344. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1345. CRT,RUN,LATCH_DATA, 0x00
  1346.  
  1347. [1024,768,16,58,72]
  1348. # Unlock CRTC
  1349. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1350. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1351. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1352. # Dump CRT Controller Registers
  1353. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  1354. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1355. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  1356. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  1357. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1358. CRT,RUN,MISC_1,0x15,0x45,0x20,0x11
  1359. CRT,RUN,MODE_CONTROL,0x02
  1360. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1361. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1362. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1363. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1364. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1365. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1366. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1367. # Lock CRTC Reg 11 for compatibility
  1368. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1369. # Dump ENG Register
  1370. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1371. # Dump MISCOUT Register
  1372. DIR,RUN,MISC_WRITE,0xef
  1373. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1374. CLK_IND, RUN, FREQ_2,0x88
  1375. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1376. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1377. CLK_IND, RUN, FREQ_2, 0x88
  1378. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1379. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1380. CRT,RUN,LATCH_DATA, 0x00
  1381.  
  1382. [1024,768,16,56,70]
  1383. # Unlock CRTC
  1384. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1385. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1386. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1387. # Dump CRT Controller Registers
  1388. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1389. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1390. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1391. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1392. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1393. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1394. CRT,RUN,MODE_CONTROL,0x02
  1395. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1396. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1397. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1398. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1399. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1400. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1401. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1402. # Lock CRTC Reg 11 for compatibility
  1403. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1404. # Dump ENG Register
  1405. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1406. # Dump MISCOUT Register
  1407. DIR,RUN,MISC_WRITE,0xef
  1408. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1409. CLK_IND, RUN, FREQ_2,0x88
  1410. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1411. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1412. CLK_IND, RUN, FREQ_2, 0x88
  1413. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1414. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1415. CRT,RUN,LATCH_DATA, 0x00
  1416.  
  1417. [1024,768,16,48,60]
  1418. # Unlock CRTC
  1419. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1420. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1421. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1422. # Dump CRT Controller Registers
  1423. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1424. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1425. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1426. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1427. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1428. CRT,RUN,MISC_1,0x15,0x48,0x20,0x11
  1429. CRT,RUN,MODE_CONTROL,0x02
  1430. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1431. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1432. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1433. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1434. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1435. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1436. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1437. # Lock CRTC Reg 11 for compatibility
  1438. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1439. # Dump ENG Register
  1440. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1441. # Dump MISCOUT Register
  1442. DIR,RUN,MISC_WRITE,0xef
  1443. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1444. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1445. CLK_IND, RUN, FREQ_2, 0x7E
  1446. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1447. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1448. CRT,RUN,LATCH_DATA, 0x00
  1449.  
  1450. [1024,768,8,96,120]
  1451. # Unlock CRTC
  1452. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1453. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1454. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1455. # Dump CRT Controller Registers
  1456. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  1457. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1458. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  1459. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1460. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1461. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  1462. CRT,RUN,MODE_CONTROL,0x02
  1463. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1464. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1465. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1466. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1467. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1468. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1469. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1470. # Lock CRTC Reg 11 for compatibility
  1471. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1472. # Dump ENG Register
  1473. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1474. # Dump MISCOUT Register
  1475. DIR,RUN,MISC_WRITE,0xef
  1476. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1477. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1478. CLK_IND, RUN, FREQ_2, 0xbd
  1479. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1480. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1481. CRT,RUN,LATCH_DATA, 0x08
  1482.  
  1483. [1024,768,8,81,100]
  1484. # Unlock CRTC
  1485. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1486. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1487. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1488. # Dump CRT Controller Registers
  1489. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  1490. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1491. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  1492. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1493. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1494. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  1495. CRT,RUN,MODE_CONTROL,0x02
  1496. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1497. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1498. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1499. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1500. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1501. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1502. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1503. # Lock CRTC Reg 11 for compatibility
  1504. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1505. # Dump ENG Register
  1506. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1507. # Dump MISCOUT Register
  1508. DIR,RUN,MISC_WRITE,0xef
  1509. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1510. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1511. CLK_IND, RUN, FREQ_2, 0xa9
  1512. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1513. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1514. CRT,RUN,LATCH_DATA, 0x08
  1515.  
  1516.  
  1517. [1024,768,8,64,80]
  1518. # Unlock CRTC
  1519. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1520. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1521. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1522. # Dump CRT Controller Registers
  1523. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1524. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1525. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1526. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1527. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1528. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1529. CRT,RUN,MODE_CONTROL,0x02
  1530. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1531. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1532. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1533. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1534. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1535. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1536. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1537. # Lock CRTC Reg 11 for compatibility
  1538. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1539. # Dump ENG Register
  1540. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1541. # Dump MISCOUT Register
  1542. DIR,RUN,MISC_WRITE,0xef
  1543. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1544. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1545. CLK_IND, RUN, FREQ_2, 0x93
  1546. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1547. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1548. CRT,RUN,LATCH_DATA, 0x08
  1549.  
  1550. [1024,768,8,60,75]
  1551. # Unlock CRTC
  1552. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1553. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1554. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1555. # Dump CRT Controller Registers
  1556. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  1557. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1558. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1559. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  1560. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1561. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1562. CRT,RUN,MODE_CONTROL,0x02
  1563. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1564. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1565. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1566. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1567. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1568. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1569. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1570. # Lock CRTC Reg 11 for compatibility
  1571. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1572. # Dump ENG Register
  1573. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1574. # Dump MISCOUT Register
  1575. DIR,RUN,MISC_WRITE,0xef
  1576. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1577. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1578. CLK_IND, RUN, FREQ_2, 0x8c
  1579. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1580. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1581. CRT,RUN,LATCH_DATA, 0x08
  1582.  
  1583. [1024,768,8,58,72]
  1584. # Unlock CRTC
  1585. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1586. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1587. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1588. # Dump CRT Controller Registers
  1589. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  1590. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1591. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  1592. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  1593. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1594. CRT,RUN,MISC_1,0x15,0x45,0x25,0x11
  1595. CRT,RUN,MODE_CONTROL,0x02
  1596. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1597. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1598. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1599. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1600. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1601. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1602. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1603. # Lock CRTC Reg 11 for compatibility
  1604. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1605. # Dump ENG Register
  1606. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1607. # Dump MISCOUT Register
  1608. DIR,RUN,MISC_WRITE,0xef
  1609. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1610. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1611. CLK_IND, RUN, FREQ_2, 0x88
  1612. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1613. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1614. CRT,RUN,LATCH_DATA, 0x08
  1615.  
  1616. [1024,768,8,56,70]
  1617. # Unlock CRTC
  1618. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1619. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1620. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1621. # Dump CRT Controller Registers
  1622. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1623. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1624. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1625. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1626. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1627. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1628. CRT,RUN,MODE_CONTROL,0x02
  1629. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1630. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1631. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1632. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1633. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1634. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1635. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1636. # Lock CRTC Reg 11 for compatibility
  1637. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1638. # Dump ENG Register
  1639. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1640. # Dump MISCOUT Register
  1641. DIR,RUN,MISC_WRITE,0xef
  1642. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1643. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1644. CLK_IND, RUN, FREQ_2, 0x88
  1645. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1646. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1647. CRT,RUN,LATCH_DATA, 0x08
  1648.  
  1649. [1024,768,8,48,60]
  1650. # Unlock CRTC
  1651. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1652. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1653. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1654. # Dump CRT Controller Registers
  1655. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1656. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1657. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1658. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1659. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1660. CRT,RUN,MISC_1,0x15,0x48,0x25,0x11
  1661. CRT,RUN,MODE_CONTROL,0x02
  1662. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1663. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1664. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1665. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1666. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1667. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1668. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1669. # Lock CRTC Reg 11 for compatibility
  1670. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1671. # Dump ENG Register
  1672. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1673. # Dump MISCOUT Register
  1674. DIR,RUN,MISC_WRITE,0xef
  1675. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1676. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1677. CLK_IND, RUN, FREQ_2, 0x7e
  1678. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1679. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1680. CRT,RUN,LATCH_DATA, 0x08
  1681.  
  1682. [800,600,32,75,120]
  1683. # Unlock CRTC
  1684. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1685. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1686. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1687. # Dump CRT Controller Registers
  1688. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  1689. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1690. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  1691. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1692. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1693. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1694. CRT,RUN,MODE_CONTROL,0x02
  1695. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1696. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1697. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1698. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1699. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1700. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1701. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1702. # Lock CRTC Reg 11 for compatibility
  1703. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1704. # Dump ENG Register
  1705. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1706. # Dump MISCOUT Register
  1707. DIR,RUN,MISC_WRITE,0xef
  1708. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1709. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1710. CLK_IND, RUN, FREQ_2, 0x8a
  1711. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1712. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1713. CRT,RUN,LATCH_DATA, 0x00
  1714.  
  1715. [800,600,32,64,100]
  1716. # Unlock CRTC
  1717. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1718. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1719. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1720. # Dump CRT Controller Registers
  1721. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  1722. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1723. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  1724. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1725. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1726. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  1727. CRT,RUN,MODE_CONTROL,0x02
  1728. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1729. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1730. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1731. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1732. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1733. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1734. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1735. # Lock CRTC Reg 11 for compatibility
  1736. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1737. # Dump ENG Register
  1738. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1739. # Dump MISCOUT Register
  1740. DIR,RUN,MISC_WRITE,0xef
  1741. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1742. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1743. CLK_IND, RUN, FREQ_2, 0x7e
  1744. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1745. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1746. CRT,RUN,LATCH_DATA, 0x00
  1747.  
  1748. [800,600,32,56,90]
  1749. # Unlock CRTC
  1750. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1751. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1752. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1753. # Dump CRT Controller Registers
  1754. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  1755. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1756. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  1757. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1758. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1759. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1760. CRT,RUN,MODE_CONTROL,0x02
  1761. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1762. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1763. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1764. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1765. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1766. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1767. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1768. # Lock CRTC Reg 11 for compatibility
  1769. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1770. # Dump ENG Register
  1771. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1772. # Dump MISCOUT Register
  1773. DIR,RUN,MISC_WRITE,0xef
  1774. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1775. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1776. CLK_IND, RUN, FREQ_2, 0x70
  1777. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1778. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1779. CRT,RUN,LATCH_DATA, 0x00
  1780.  
  1781. [800,600,32,46,75]
  1782. # Unlock CRTC
  1783. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1784. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1785. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1786. # Dump CRT Controller Registers
  1787. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  1788. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1789. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  1790. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1791. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1792. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1793. CRT,RUN,MODE_CONTROL,0x02
  1794. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1795. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1796. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  1797. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1798. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1799. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1800. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1801. # Lock CRTC Reg 11 for compatibility
  1802. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1803. # Dump ENG Register
  1804. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1805. # Dump MISCOUT Register
  1806. DIR,RUN,MISC_WRITE,0xef
  1807. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1808. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1809. CLK_IND, RUN, FREQ_2, 0x60
  1810. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1811. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1812. CRT,RUN,LATCH_DATA, 0x00
  1813.  
  1814. [800,600,32,48,72]
  1815. # Unlock CRTC
  1816. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1817. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1818. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1819. # Dump CRT Controller Registers
  1820. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  1821. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1822. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  1823. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1824. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1825. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1826. CRT,RUN,MODE_CONTROL,0x02
  1827. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1828. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1829. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1830. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1831. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1832. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1833. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1834. # Lock CRTC Reg 11 for compatibility
  1835. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1836. # Dump ENG Register
  1837. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1838. # Dump MISCOUT Register
  1839. DIR,RUN,MISC_WRITE,0xef
  1840. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1841. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1842. CLK_IND, RUN, FREQ_2, 0x61
  1843. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1844. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1845. CRT,RUN,LATCH_DATA, 0x00
  1846.  
  1847. [800,600,32,37,60]
  1848. # Unlock CRTC
  1849. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1850. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1851. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1852. # Dump CRT Controller Registers
  1853. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  1854. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1855. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  1856. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1857. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1858. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1859. CRT,RUN,MODE_CONTROL,0x02
  1860. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1861. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1862. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  1863. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1864. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1865. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1866. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1867. # Lock CRTC Reg 11 for compatibility
  1868. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1869. # Dump ENG Register
  1870. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1871. # Dump MISCOUT Register
  1872. DIR,RUN,MISC_WRITE,0xef
  1873. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1874. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1875. CLK_IND, RUN, FREQ_2, 0x4D
  1876. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1877. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1878. CRT,RUN,LATCH_DATA, 0x00
  1879.  
  1880.  
  1881. [800,600,32,35,56]
  1882. # Unlock CRTC
  1883. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1884. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1885. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1886. # Dump CRT Controller Registers
  1887. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  1888. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1889. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  1890. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1891. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1892. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1893. CRT,RUN,MODE_CONTROL,0x02
  1894. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1895. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1896. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1897. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1898. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1899. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1900. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1901. # Lock CRTC Reg 11 for compatibility
  1902. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1903. # Dump ENG Register
  1904. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1905. # Dump MISCOUT Register
  1906. DIR,RUN,MISC_WRITE,0xef
  1907. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1908. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1909. CLK_IND, RUN, FREQ_2, 0x45
  1910. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1911. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1912. CRT,RUN,LATCH_DATA, 0x00
  1913.  
  1914. [800,600,24,75,120]
  1915. # Unlock CRTC
  1916. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1917. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1918. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1919. # Dump CRT Controller Registers
  1920. CRT,RUN,HORZ_TOTAL,0x58,0x4c,0x4a,0x00,0x4b,0x14,0x82,0xf0,0x00,0x60
  1921. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1922. CRT,RUN,VERT_RETRACE_START,0x59,0x0b,0x57
  1923. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1924. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1925. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  1926. CRT,RUN,MODE_CONTROL,0x02
  1927. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1928. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1929. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1930. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1931. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1932. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1933. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1934. # Lock CRTC Reg 11 for compatibility
  1935. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1936. # Dump ENG Register
  1937. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1938. # Dump MISCOUT Register
  1939. DIR,RUN,MISC_WRITE,0xef
  1940. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1941. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1942. CLK_IND, RUN, FREQ_2, 0x8a
  1943. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1944. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1945. CRT,RUN,LATCH_DATA, 0x00
  1946.  
  1947.  
  1948. [800,600,24,64,100]
  1949. # Unlock CRTC
  1950. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1951. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1952. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1953. # Dump CRT Controller Registers
  1954. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x50,0x19,0x7a,0xf0,0x00,0x60
  1955. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1956. CRT,RUN,VERT_RETRACE_START,0x59,0x08,0x57
  1957. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1958. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1959. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  1960. CRT,RUN,MODE_CONTROL,0x02
  1961. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1962. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1963. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1964. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1965. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1966. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1967. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1968. # Lock CRTC Reg 11 for compatibility
  1969. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1970. # Dump ENG Register
  1971. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1972. # Dump MISCOUT Register
  1973. DIR,RUN,MISC_WRITE,0xef
  1974. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1975. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1976. CLK_IND, RUN, FREQ_2, 0x7e
  1977. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1978. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1979. CRT,RUN,LATCH_DATA, 0x00
  1980.  
  1981.  
  1982. [800,600,24,56,90]
  1983. # Unlock CRTC
  1984. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1985. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1986. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1987. # Dump CRT Controller Registers
  1988. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4e,0x1a,0x6f,0xf0,0x00,0x60
  1989. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1990. CRT,RUN,VERT_RETRACE_START,0x57,0x09,0x57
  1991. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1992. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1993. CRT,RUN,MISC_1,0x15,0x55,0x2f,0x11
  1994. CRT,RUN,MODE_CONTROL,0x02
  1995. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1996. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1997. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1998. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1999. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2000. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2001. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2002. # Lock CRTC Reg 11 for compatibility
  2003. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2004. # Dump ENG Register
  2005. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2006. # Dump MISCOUT Register
  2007. DIR,RUN,MISC_WRITE,0xef
  2008. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2009. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2010. CLK_IND, RUN, FREQ_2, 0x70
  2011. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2012. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2013. CRT,RUN,LATCH_DATA, 0x00
  2014.  
  2015.  
  2016. [800,600,24,46,75]
  2017. # Unlock CRTC
  2018. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2019. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2020. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2021. # Dump CRT Controller Registers
  2022. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4d,0x15,0x6f,0xe0,0x00,0x60
  2023. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2024. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2025. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2026. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2027. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2028. CRT,RUN,MODE_CONTROL,0x02
  2029. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2030. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2031. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2032. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2033. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2034. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2035. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2036. # Lock CRTC Reg 11 for compatibility
  2037. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2038. # Dump ENG Register
  2039. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2040. # Dump MISCOUT Register
  2041. DIR,RUN,MISC_WRITE,0xef
  2042. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2043. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2044. CLK_IND, RUN, FREQ_2, 0x60
  2045. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2046. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2047. CRT,RUN,LATCH_DATA, 0x00
  2048.  
  2049.  
  2050. [800,600,24,48,72]
  2051. # Unlock CRTC
  2052. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2053. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2054. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2055. # Dump CRT Controller Registers
  2056. ##CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4e,0x1a,0x8e,0xf0,0x00,0x60
  2057. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x80,0x52,0x1d,0x98,0xf0,0x00,0x60
  2058. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2059. ##CRT,RUN,VERT_RETRACE_START,0x71,0x27,0x57
  2060. CRT,RUN,VERT_RETRACE_START,0x7c,0x02,0x57
  2061. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2062. CRT,RUN,UNDERLINE_LOCATION,0x00,0x58,0x00,0xe3,0xff
  2063. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2064. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2065. CRT,RUN,MODE_CONTROL,0x02
  2066. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2067. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2068. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2069. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2070. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2071. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2072. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2073. # Lock CRTC Reg 11 for compatibility
  2074. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2075. # Dump ENG Register
  2076. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2077. # Dump MISCOUT Register
  2078. DIR,RUN,MISC_WRITE,0xef
  2079. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2080. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2081. ##CLK_IND, RUN, FREQ_2, 0x61
  2082. CLK_IND, RUN, FREQ_2, 0x62
  2083. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2084. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2085. CRT,RUN,LATCH_DATA, 0x00
  2086.  
  2087. [800,600,24,37,60]
  2088. # Unlock CRTC
  2089. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2090. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2091. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2092. # Dump CRT Controller Registers
  2093. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4e,0x1a,0x72,0xf0,0x00,0x60
  2094. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2095. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2096. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2097. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2098. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2099. CRT,RUN,MODE_CONTROL,0x02
  2100. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2101. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2102. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2103. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2104. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2105. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2106. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2107. # Lock CRTC Reg 11 for compatibility
  2108. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2109. # Dump ENG Register
  2110. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2111. # Dump MISCOUT Register
  2112. DIR,RUN,MISC_WRITE,0xef
  2113. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2114. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2115. CLK_IND, RUN, FREQ_2, 0x4d
  2116. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2117. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2118. CRT,RUN,LATCH_DATA, 0x00
  2119.  
  2120.  
  2121. [800,600,24,35,56]
  2122. # Unlock CRTC
  2123. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2124. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2125. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2126. # Dump CRT Controller Registers
  2127. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4d,0x16,0x72,0xf0,0x00,0x60
  2128. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2129. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2130. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2131. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2132. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2133. CRT,RUN,MODE_CONTROL,0x02
  2134. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2135. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2136. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2137. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2138. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2139. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2140. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2141. # Lock CRTC Reg 11 for compatibility
  2142. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2143. # Dump ENG Register
  2144. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2145. # Dump MISCOUT Register
  2146. DIR,RUN,MISC_WRITE,0xef
  2147. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2148. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2149. CLK_IND, RUN, FREQ_2, 0x45
  2150. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2151. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2152. CRT,RUN,LATCH_DATA, 0x00
  2153.  
  2154. [800,600,16,75,120]
  2155. # Unlock CRTC
  2156. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2157. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2158. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2159. # Dump CRT Controller Registers
  2160. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2161. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2162. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2163. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2164. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2165. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2166. CRT,RUN,MODE_CONTROL,0x02
  2167. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2168. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2169. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2170. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2171. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2172. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2173. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2174. # Lock CRTC Reg 11 for compatibility
  2175. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2176. # Dump ENG Register
  2177. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2178. # Dump MISCOUT Register
  2179. DIR,RUN,MISC_WRITE,0xef
  2180. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2181. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2182. CLK_IND, RUN, FREQ_2, 0x8a
  2183. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2184. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2185. CRT,RUN,LATCH_DATA, 0x00
  2186.  
  2187. [800,600,16,64,100]
  2188. # Unlock CRTC
  2189. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2190. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2191. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2192. # Dump CRT Controller Registers
  2193. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2194. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2195. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2196. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2197. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2198. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2199. CRT,RUN,MODE_CONTROL,0x02
  2200. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2201. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2202. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2203. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2204. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2205. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2206. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2207. # Lock CRTC Reg 11 for compatibility
  2208. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2209. # Dump ENG Register
  2210. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2211. # Dump MISCOUT Register
  2212. DIR,RUN,MISC_WRITE,0xef
  2213. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2214. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2215. CLK_IND, RUN, FREQ_2, 0x7e
  2216. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2217. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2218. CRT,RUN,LATCH_DATA, 0x00
  2219.  
  2220. [800,600,16,56,90]
  2221. # Unlock CRTC
  2222. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2223. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2224. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2225. # Dump CRT Controller Registers
  2226. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2227. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2228. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2229. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2230. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2231. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2232. CRT,RUN,MODE_CONTROL,0x02
  2233. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2234. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2235. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2236. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2237. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2238. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2239. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2240. # Lock CRTC Reg 11 for compatibility
  2241. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2242. # Dump ENG Register
  2243. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2244. # Dump MISCOUT Register
  2245. DIR,RUN,MISC_WRITE,0xef
  2246. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2247. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2248. CLK_IND, RUN, FREQ_2, 0x70
  2249. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2250. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2251. CRT,RUN,LATCH_DATA, 0x00
  2252.  
  2253. [800,600,16,46,75]
  2254. # Unlock CRTC
  2255. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2256. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2257. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2258. # Dump CRT Controller Registers
  2259. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2260. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2261. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2262. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2263. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2264. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2265. CRT,RUN,MODE_CONTROL,0x02
  2266. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2267. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2268. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2269. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2270. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2271. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2272. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2273. # Lock CRTC Reg 11 for compatibility
  2274. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2275. # Dump ENG Register
  2276. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2277. # Dump MISCOUT Register
  2278. DIR,RUN,MISC_WRITE,0xef
  2279. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2280. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2281. CLK_IND, RUN, FREQ_2, 0x60
  2282. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2283. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2284. CRT,RUN,LATCH_DATA, 0x00
  2285.  
  2286. [800,600,16,48,72]
  2287. # Unlock CRTC
  2288. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2289. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2290. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2291. # Dump CRT Controller Registers
  2292. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2293. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2294. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2295. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2296. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2297. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2298. CRT,RUN,MODE_CONTROL,0x02
  2299. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2300. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2301. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2302. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2303. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2304. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2305. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2306. # Lock CRTC Reg 11 for compatibility
  2307. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2308. # Dump ENG Register
  2309. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2310. # Dump MISCOUT Register
  2311. DIR,RUN,MISC_WRITE,0xef
  2312. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2313. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2314. CLK_IND, RUN, FREQ_2, 0x61
  2315. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2316. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2317. CRT,RUN,LATCH_DATA, 0x00
  2318.  
  2319. [800,600,16,37,60]
  2320. # Unlock CRTC
  2321. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2322. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2323. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2324. # Dump CRT Controller Registers
  2325. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2326. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2327. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2328. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2329. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2330. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2331. CRT,RUN,MODE_CONTROL,0x02
  2332. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2333. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2334. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2335. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2336. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2337. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2338. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2339. # Lock CRTC Reg 11 for compatibility
  2340. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2341. # Dump ENG Register
  2342. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2343. # Dump MISCOUT Register
  2344. DIR,RUN,MISC_WRITE,0xef
  2345. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2346. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2347. CLK_IND, RUN, FREQ_2, 0x4D
  2348. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2349. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2350. CRT,RUN,LATCH_DATA, 0x00
  2351.  
  2352.  
  2353. [800,600,16,35,56]
  2354. # Unlock CRTC
  2355. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2356. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2357. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2358. # Dump CRT Controller Registers
  2359. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2360. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2361. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2362. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2363. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2364. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2365. CRT,RUN,MODE_CONTROL,0x02
  2366. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2367. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2368. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2369. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2370. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2371. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2372. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2373. # Lock CRTC Reg 11 for compatibility
  2374. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2375. # Dump ENG Register
  2376. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2377. # Dump MISCOUT Register
  2378. DIR,RUN,MISC_WRITE,0xef
  2379. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2380. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2381. CLK_IND, RUN, FREQ_2, 0x45
  2382. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2383. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2384. CRT,RUN,LATCH_DATA, 0x00
  2385.  
  2386. [800,600,8,75,120]
  2387. # Unlock CRTC
  2388. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2389. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2390. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2391. # Dump CRT Controller Registers
  2392. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2393. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2394. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2395. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2396. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2397. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2398. CRT,RUN,MODE_CONTROL,0x02
  2399. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2400. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2401. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2402. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2403. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2404. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2405. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2406. # Lock CRTC Reg 11 for compatibility
  2407. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2408. # Dump ENG Register
  2409. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2410. # Dump MISCOUT Register
  2411. DIR,RUN,MISC_WRITE,0xef
  2412. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2413. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2414. CLK_IND, RUN, FREQ_2, 0x8a
  2415. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2416. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2417. CRT,RUN,LATCH_DATA, 0x08
  2418.  
  2419. [800,600,8,64,100]
  2420. # Unlock CRTC
  2421. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2422. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2423. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2424. # Dump CRT Controller Registers
  2425. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2426. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2427. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2428. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2429. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2430. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2431. CRT,RUN,MODE_CONTROL,0x02
  2432. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2433. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2434. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2435. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2436. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2437. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2438. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2439. # Lock CRTC Reg 11 for compatibility
  2440. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2441. # Dump ENG Register
  2442. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2443. # Dump MISCOUT Register
  2444. DIR,RUN,MISC_WRITE,0xef
  2445. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2446. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2447. CLK_IND, RUN, FREQ_2, 0x7e
  2448. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2449. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2450. CRT,RUN,LATCH_DATA, 0x08
  2451.  
  2452. [800,600,8,56,90]
  2453. # Unlock CRTC
  2454. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2455. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2456. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2457. # Dump CRT Controller Registers
  2458. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2459. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2460. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2461. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2462. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2463. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2464. CRT,RUN,MODE_CONTROL,0x02
  2465. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2466. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2467. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2468. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2469. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2470. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2471. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2472. # Lock CRTC Reg 11 for compatibility
  2473. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2474. # Dump ENG Register
  2475. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2476. # Dump MISCOUT Register
  2477. DIR,RUN,MISC_WRITE,0xef
  2478. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2479. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2480. CLK_IND, RUN, FREQ_2, 0x70
  2481. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2482. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2483. CRT,RUN,LATCH_DATA, 0x08
  2484.  
  2485. [800,600,8,46,75]
  2486. # Unlock CRTC
  2487. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2488. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2489. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2490. # Dump CRT Controller Registers
  2491. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2492. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2493. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2494. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2495. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2496. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2497. CRT,RUN,MODE_CONTROL,0x02
  2498. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2499. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2500. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2501. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2502. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2503. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2504. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2505. # Lock CRTC Reg 11 for compatibility
  2506. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2507. # Dump ENG Register
  2508. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2509. # Dump MISCOUT Register
  2510. DIR,RUN,MISC_WRITE,0xef
  2511. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2512. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2513. CLK_IND, RUN, FREQ_2, 0x60
  2514. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2515. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2516. CRT,RUN,LATCH_DATA, 0x08
  2517.  
  2518. [800,600,8,48,72]
  2519. # Unlock CRTC
  2520. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2521. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2522. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2523. # Dump CRT Controller Registers
  2524. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2525. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2526. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2527. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2528. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2529. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2530. CRT,RUN,MODE_CONTROL,0x02
  2531. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2532. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2533. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2534. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2535. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2536. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2537. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2538. # Lock CRTC Reg 11 for compatibility
  2539. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2540. # Dump ENG Register
  2541. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2542. # Dump MISCOUT Register
  2543. DIR,RUN,MISC_WRITE,0xef
  2544. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2545. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2546. CLK_IND, RUN, FREQ_2, 0x61
  2547. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2548. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2549. CRT,RUN,LATCH_DATA, 0x08
  2550.  
  2551. [800,600,8,37,60]
  2552. # Unlock CRTC
  2553. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2554. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2555. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2556. # Dump CRT Controller Registers
  2557. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2558. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2559. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2560. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2561. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2562. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2563. CRT,RUN,MODE_CONTROL,0x02
  2564. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2565. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2566. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2567. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2568. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2569. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2570. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2571. # Lock CRTC Reg 11 for compatibility
  2572. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2573. # Dump ENG Register
  2574. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2575. # Dump MISCOUT Register
  2576. DIR,RUN,MISC_WRITE,0xef
  2577. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2578. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2579. CLK_IND, RUN, FREQ_2, 0x4D
  2580. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2581. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2582. CRT,RUN,LATCH_DATA, 0x08
  2583.  
  2584. [800,600,8,35,56]
  2585. # Unlock CRTC
  2586. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2587. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2588. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2589. # Dump CRT Controller Registers
  2590. CRT,RUN,HORZ_TOTAL,0x3b,0x31,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2591. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2592. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2593. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2594. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2595. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2596. CRT,RUN,MODE_CONTROL,0x02
  2597. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2598. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2599. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2600. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2601. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2602. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2603. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2604. # Lock CRTC Reg 11 for compatibility
  2605. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2606. # Dump ENG Register
  2607. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2608. # Dump MISCOUT Register
  2609. DIR,RUN,MISC_WRITE,0xef
  2610. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2611. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2612. CLK_IND, RUN, FREQ_2, 0x45
  2613. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2614. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2615. CRT,RUN,LATCH_DATA, 0x08
  2616.  
  2617. [640,480,32,64,120]
  2618. # Unlock CRTC
  2619. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2620. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2621. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2622. # Dump CRT Controller Registers
  2623. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2624. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2625. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2626. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  2627. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2628. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2629. CRT,RUN,MODE_CONTROL,0x02
  2630. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2631. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2632. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2633. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2634. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2635. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2636. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2637. # Lock CRTC Reg 11 for compatibility
  2638. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2639. # Dump ENG Register
  2640. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2641. # Dump MISCOUT Register
  2642. DIR,RUN,MISC_WRITE,0xef
  2643. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2644. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2645. CLK_IND, RUN, FREQ_2, 0x67
  2646. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2647. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2648. CRT,RUN,LATCH_DATA, 0x00
  2649.  
  2650. [640,480,32,52,100]
  2651. # Unlock CRTC
  2652. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2653. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2654. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2655. # Dump CRT Controller Registers
  2656. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  2657. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2658. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  2659. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  2660. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2661. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  2662. CRT,RUN,MODE_CONTROL,0x02
  2663. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2664. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2665. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2666. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2667. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2668. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2669. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2670. # Lock CRTC Reg 11 for compatibility
  2671. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2672. # Dump ENG Register
  2673. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2674. # Dump MISCOUT Register
  2675. DIR,RUN,MISC_WRITE,0xef
  2676. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2677. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2678. CLK_IND, RUN, FREQ_2, 0x50
  2679. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2680. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2681. CRT,RUN,LATCH_DATA, 0x00
  2682.  
  2683. [640,480,32,48,90]
  2684. # Unlock CRTC
  2685. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2686. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2687. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2688. # Dump CRT Controller Registers
  2689. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2690. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2691. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  2692. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  2693. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2694. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2695. CRT,RUN,MODE_CONTROL,0x02
  2696. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2697. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2698. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2699. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2700. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2701. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2702. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2703. # Lock CRTC Reg 11 for compatibility
  2704. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2705. # Dump ENG Register
  2706. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2707. # Dump MISCOUT Register
  2708. DIR,RUN,MISC_WRITE,0xef
  2709. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2710. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2711. CLK_IND, RUN, FREQ_2, 0x4d
  2712. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2713. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2714. CRT,RUN,LATCH_DATA, 0x00
  2715.  
  2716. [640,480,32,37,75]
  2717. # Unlock CRTC
  2718. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2719. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2720. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2721. # Dump CRT Controller Registers
  2722. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  2723. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2724. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  2725. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  2726. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2727. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2728. CRT,RUN,MODE_CONTROL,0x02
  2729. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2730. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2731. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2732. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2733. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2734. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2735. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2736. # Lock CRTC Reg 11 for compatibility
  2737. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2738. # Dump ENG Register
  2739. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2740. # Dump MISCOUT Register
  2741. DIR,RUN,MISC_WRITE,0xef
  2742. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2743. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2744. CLK_IND, RUN, FREQ_2, 0x3a
  2745. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2746. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2747. CRT,RUN,LATCH_DATA, 0x00
  2748.  
  2749. [640,480,32,37,72]
  2750. # Unlock CRTC
  2751. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2752. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2753. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2754. # Dump CRT Controller Registers
  2755. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  2756. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2757. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  2758. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  2759. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2760. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2761. CRT,RUN,MODE_CONTROL,0x02
  2762. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2763. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2764. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2765. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2766. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2767. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2768. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2769. # Lock CRTC Reg 11 for compatibility
  2770. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2771. # Dump ENG Register
  2772. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2773. # Dump MISCOUT Register
  2774. DIR,RUN,MISC_WRITE,0xef
  2775. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2776. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2777. CLK_IND, RUN, FREQ_2, 0x3a
  2778. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2779. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2780. CRT,RUN,LATCH_DATA, 0x00
  2781.  
  2782. [640,480,32,31,60]
  2783. # Unlock CRTC
  2784. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2785. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2786. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2787. # Dump CRT Controller Registers
  2788. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  2789. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2790. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  2791. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  2792. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2793. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2794. CRT,RUN,MODE_CONTROL,0x02
  2795. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2796. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2797. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2798. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2799. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2800. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2801. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2802. # Lock CRTC Reg 11 for compatibility
  2803. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2804. # Dump ENG Register
  2805. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2806. # Dump MISCOUT Register
  2807. DIR,RUN,MISC_WRITE,0xef
  2808. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2809. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2810. CLK_IND, RUN, FREQ_2, 0x21
  2811. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2812. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2813. CRT,RUN,LATCH_DATA, 0x00
  2814.  
  2815. [640,480,24,64,120]
  2816. # Unlock CRTC
  2817. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2818. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2819. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2820. # Dump CRT Controller Registers
  2821. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x12,0x3e,0x00,0x40
  2822. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2823. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2824. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0c,0xab,0xff
  2825. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2826. CRT,RUN,MISC_1,0x15,0x58,0x24,0x11
  2827. CRT,RUN,MODE_CONTROL,0x02
  2828. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2829. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2830. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2831. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2832. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2833. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2834. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2835. # Lock CRTC Reg 11 for compatibility
  2836. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2837. # Dump ENG Register
  2838. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2839. # Dump MISCOUT Register
  2840. DIR,RUN,MISC_WRITE,0xef
  2841. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2842. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2843. CLK_IND, RUN, FREQ_2, 0x67
  2844. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2845. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2846. CRT,RUN,LATCH_DATA, 0x00
  2847.  
  2848.  
  2849. [640,480,24,52,100]
  2850. # Unlock CRTC
  2851. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2852. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2853. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2854. # Dump CRT Controller Registers
  2855. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3d,0x03,0x06,0x3e,0x00,0x40
  2856. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2857. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  2858. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x00,0xab,0xff
  2859. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2860. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2861. CRT,RUN,MODE_CONTROL,0x02
  2862. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2863. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2864. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2865. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2866. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2867. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2868. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2869. # Lock CRTC Reg 11 for compatibility
  2870. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2871. # Dump ENG Register
  2872. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2873. # Dump MISCOUT Register
  2874. DIR,RUN,MISC_WRITE,0xef
  2875. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2876. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2877. CLK_IND, RUN, FREQ_2, 0x50
  2878. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2879. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2880. CRT,RUN,LATCH_DATA, 0x00
  2881.  
  2882. [640,480,24,48,90]
  2883. # Unlock CRTC
  2884. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2885. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2886. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2887. # Dump CRT Controller Registers
  2888. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x14,0x3e,0x00,0x40
  2889. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2890. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  2891. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  2892. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2893. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2894. CRT,RUN,MODE_CONTROL,0x02
  2895. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2896. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2897. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2898. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2899. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2900. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2901. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2902. # Lock CRTC Reg 11 for compatibility
  2903. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2904. # Dump ENG Register
  2905. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2906. # Dump MISCOUT Register
  2907. DIR,RUN,MISC_WRITE,0xef
  2908. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2909. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2910. CLK_IND, RUN, FREQ_2, 0x4d
  2911. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2912. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2913. CRT,RUN,LATCH_DATA, 0x00
  2914.  
  2915.  
  2916. [640,480,24,37,75]
  2917. # Unlock CRTC
  2918. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2919. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2920. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2921. # Dump CRT Controller Registers
  2922. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8f,0x3d,0x03,0xf2,0x1f,0x00,0x40
  2923. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2924. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  2925. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe0,0xf3,0xab,0xff
  2926. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2927. CRT,RUN,MISC_1,0x15,0x45,0x24,0x11
  2928. CRT,RUN,MODE_CONTROL,0x02
  2929. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2930. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2931. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2932. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2933. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2934. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2935. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2936. # Lock CRTC Reg 11 for compatibility
  2937. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2938. # Dump ENG Register
  2939. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2940. # Dump MISCOUT Register
  2941. DIR,RUN,MISC_WRITE,0xef
  2942. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2943. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2944. CLK_IND, RUN, FREQ_2, 0x39
  2945. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2946. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2947. CRT,RUN,LATCH_DATA, 0x00
  2948.  
  2949. [640,480,24,37,72]
  2950. # Unlock CRTC
  2951. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2952. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2953. CRT,RUN,REG_LOCK_1,0x48,0xa0
  2954. # Dump CRT Controller Registers
  2955. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x3d,0x01,0x06,0x3e,0x00,0x40
  2956. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2957. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  2958. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  2959. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2960. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2961. CRT,RUN,MODE_CONTROL,0x02
  2962. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2963. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2964. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2965. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2966. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2967. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2968. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2969. # Lock CRTC Reg 11 for compatibility
  2970. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2971. # Dump ENG Register
  2972. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2973. # Dump MISCOUT Register
  2974. DIR,RUN,MISC_WRITE,0xef
  2975. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2976. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2977. CLK_IND, RUN, FREQ_2, 0x3a
  2978. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2979. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2980. CRT,RUN,LATCH_DATA, 0x00
  2981.  
  2982. [640,480,24,31,60]
  2983. # Unlock CRTC
  2984. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2985. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2986. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2987. # Dump CRT Controller Registers
  2988. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3e,0x07,0x0b,0x3e,0x00,0x40
  2989. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2990. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  2991. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe0,0x0c,0xab,0xff
  2992. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2993. CRT,RUN,MISC_1,0x15,0x41,0x24,0x11
  2994. CRT,RUN,MODE_CONTROL,0x02
  2995. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2996. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2997. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2998. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2999. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3000. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  3001. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3002. # Lock CRTC Reg 11 for compatibility
  3003. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3004. # Dump ENG Register
  3005. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3006. # Dump MISCOUT Register
  3007. DIR,RUN,MISC_WRITE,0xef
  3008. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3009. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3010. CLK_IND, RUN, FREQ_2, 0x21
  3011. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3012. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3013. CRT,RUN,LATCH_DATA, 0x00
  3014.  
  3015. [640,480,16,64,120]
  3016. # Unlock CRTC
  3017. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3018. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3019. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3020. # Dump CRT Controller Registers
  3021. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3022. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3023. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3024. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  3025. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3026. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3027. CRT,RUN,MODE_CONTROL,0x02
  3028. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3029. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3030. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3031. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3032. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3033. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3034. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3035. # Lock CRTC Reg 11 for compatibility
  3036. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3037. # Dump ENG Register
  3038. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3039. # Dump MISCOUT Register
  3040. DIR,RUN,MISC_WRITE,0xef
  3041. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3042. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3043. CLK_IND, RUN, FREQ_2, 0x67
  3044. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3045. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3046. CRT,RUN,LATCH_DATA, 0x00
  3047.  
  3048. [640,480,16,52,100]
  3049. # Unlock CRTC
  3050. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3051. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3052. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3053. # Dump CRT Controller Registers
  3054. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  3055. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3056. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3057. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  3058. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3059. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  3060. CRT,RUN,MODE_CONTROL,0x02
  3061. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3062. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3063. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3064. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3065. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3066. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3067. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3068. # Lock CRTC Reg 11 for compatibility
  3069. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3070. # Dump ENG Register
  3071. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3072. # Dump MISCOUT Register
  3073. DIR,RUN,MISC_WRITE,0xef
  3074. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3075. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3076. CLK_IND, RUN, FREQ_2, 0x50
  3077. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3078. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3079. CRT,RUN,LATCH_DATA, 0x00
  3080.  
  3081. [640,480,16,48,90]
  3082. # Unlock CRTC
  3083. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3084. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3085. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3086. # Dump CRT Controller Registers
  3087. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3088. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3089. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3090. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3091. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3092. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3093. CRT,RUN,MODE_CONTROL,0x02
  3094. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3095. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3096. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3097. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3098. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3099. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3100. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3101. # Lock CRTC Reg 11 for compatibility
  3102. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3103. # Dump ENG Register
  3104. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3105. # Dump MISCOUT Register
  3106. DIR,RUN,MISC_WRITE,0xef
  3107. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3108. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3109. CLK_IND, RUN, FREQ_2, 0x4d
  3110. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3111. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3112. CRT,RUN,LATCH_DATA, 0x00
  3113.  
  3114. [640,480,16,37,75]
  3115. # Unlock CRTC
  3116. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3117. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3118. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3119. # Dump CRT Controller Registers
  3120. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3121. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3122. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3123. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3124. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3125. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3126. CRT,RUN,MODE_CONTROL,0x02
  3127. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3128. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3129. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3130. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3131. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3132. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3133. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3134. # Lock CRTC Reg 11 for compatibility
  3135. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3136. # Dump ENG Register
  3137. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3138. # Dump MISCOUT Register
  3139. DIR,RUN,MISC_WRITE,0xef
  3140. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3141. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3142. CLK_IND, RUN, FREQ_2, 0x3a
  3143. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3144. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3145. CRT,RUN,LATCH_DATA, 0x00
  3146.  
  3147. [640,480,16,37,72]
  3148. # Unlock CRTC
  3149. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3150. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3151. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3152. # Dump CRT Controller Registers
  3153. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3154. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3155. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3156. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3157. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3158. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3159. CRT,RUN,MODE_CONTROL,0x02
  3160. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3161. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3162. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3163. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3164. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3165. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3166. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3167. # Lock CRTC Reg 11 for compatibility
  3168. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3169. # Dump ENG Register
  3170. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3171. # Dump MISCOUT Register
  3172. DIR,RUN,MISC_WRITE,0xef
  3173. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3174. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3175. CLK_IND, RUN, FREQ_2, 0x3a
  3176. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3177. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3178. CRT,RUN,LATCH_DATA, 0x00
  3179.  
  3180. [640,480,16,31,60]
  3181. # Unlock CRTC
  3182. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3183. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3184. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3185. # Dump CRT Controller Registers
  3186. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3187. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3188. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3189. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3190. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3191. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3192. CRT,RUN,MODE_CONTROL,0x02
  3193. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3194. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3195. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3196. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3197. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3198. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3199. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3200. # Lock CRTC Reg 11 for compatibility
  3201. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3202. # Dump ENG Register
  3203. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3204. # Dump MISCOUT Register
  3205. DIR,RUN,MISC_WRITE,0xef
  3206. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3207. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3208. CLK_IND, RUN, FREQ_2, 0x21
  3209. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3210. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3211. CRT,RUN,LATCH_DATA, 0x00
  3212.  
  3213. [640,480,8,64,120]
  3214. # Unlock CRTC
  3215. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3216. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3217. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3218. # Dump CRT Controller Registers
  3219. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3220. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3221. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3222. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  3223. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3224. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3225. CRT,RUN,MODE_CONTROL,0x02
  3226. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3227. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3228. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3229. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3230. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3231. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3232. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3233. # Lock CRTC Reg 11 for compatibility
  3234. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3235. # Dump ENG Register
  3236. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3237. # Dump MISCOUT Register
  3238. DIR,RUN,MISC_WRITE,0xef
  3239. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3240. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3241. CLK_IND, RUN, FREQ_2, 0x67
  3242. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3243. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3244. CRT,RUN,LATCH_DATA, 0x08
  3245.  
  3246. [640,480,8,52,100]
  3247. # Unlock CRTC
  3248. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3249. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3250. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3251. # Dump CRT Controller Registers
  3252. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  3253. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3254. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3255. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  3256. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3257. CRT,RUN,MISC_1,0x15,0x28,0x40,0x11
  3258. CRT,RUN,MODE_CONTROL,0x02
  3259. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3260. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3261. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3262. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3263. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3264. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3265. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3266. # Lock CRTC Reg 11 for compatibility
  3267. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3268. # Dump ENG Register
  3269. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3270. # Dump MISCOUT Register
  3271. DIR,RUN,MISC_WRITE,0xef
  3272. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3273. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3274. CLK_IND, RUN, FREQ_2, 0x50
  3275. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3276. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3277. CRT,RUN,LATCH_DATA, 0x08
  3278.  
  3279. [640,480,8,48,90]
  3280. # Unlock CRTC
  3281. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3282. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3283. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3284. # Dump CRT Controller Registers
  3285. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3286. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3287. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3288. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3289. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3290. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3291. CRT,RUN,MODE_CONTROL,0x02
  3292. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3293. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3294. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3295. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3296. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3297. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3298. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3299. # Lock CRTC Reg 11 for compatibility
  3300. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3301. # Dump ENG Register
  3302. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3303. # Dump MISCOUT Register
  3304. DIR,RUN,MISC_WRITE,0xef
  3305. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3306. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3307. CLK_IND, RUN, FREQ_2, 0x4d
  3308. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3309. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3310. CRT,RUN,LATCH_DATA, 0x08
  3311.  
  3312. [640,480,8,37,75]
  3313. # Unlock CRTC
  3314. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3315. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3316. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3317. # Dump CRT Controller Registers
  3318. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3319. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3320. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3321. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3322. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3323. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3324. CRT,RUN,MODE_CONTROL,0x02
  3325. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3326. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3327. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3328. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3329. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3330. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3331. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3332. # Lock CRTC Reg 11 for compatibility
  3333. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3334. # Dump ENG Register
  3335. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3336. # Dump MISCOUT Register
  3337. DIR,RUN,MISC_WRITE,0xef
  3338. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3339. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3340. CLK_IND, RUN, FREQ_2, 0x3a
  3341. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3342. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3343. CRT,RUN,LATCH_DATA, 0x08
  3344.  
  3345. [640,480,8,37,72]
  3346. # Unlock CRTC
  3347. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3348. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3349. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3350. # Dump CRT Controller Registers
  3351. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3352. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3353. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3354. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3355. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3356. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3357. CRT,RUN,MODE_CONTROL,0x02
  3358. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3359. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3360. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3361. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3362. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3363. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3364. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3365. # Lock CRTC Reg 11 for compatibility
  3366. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3367. # Dump ENG Register
  3368. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3369. # Dump MISCOUT Register
  3370. DIR,RUN,MISC_WRITE,0xef
  3371. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3372. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3373. CLK_IND, RUN, FREQ_2, 0x3a
  3374. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3375. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3376. CRT,RUN,LATCH_DATA, 0x08
  3377.  
  3378. [640,480,8,31,60]
  3379. # Unlock CRTC
  3380. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3381. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3382. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3383. # Dump CRT Controller Registers
  3384. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3385. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3386. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3387. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3388. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3389. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3390. CRT,RUN,MODE_CONTROL,0x02
  3391. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3392. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3393. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3394. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3395. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3396. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3397. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3398. # Lock CRTC Reg 11 for compatibility
  3399. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3400. # Dump ENG Register
  3401. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3402. # Dump MISCOUT Register
  3403. DIR,RUN,MISC_WRITE,0xef
  3404. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3405. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3406. CLK_IND, RUN, FREQ_2, 0x21
  3407. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3408. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3409. CRT,RUN,LATCH_DATA, 0x08
  3410.  
  3411.  
  3412.  
  3413.  
  3414.  
  3415.  
  3416.